Design and Simulation of GaussianFSK Transmitter in UHF Band Using Direct Modulation of ΣΔ Modulator Fractional-N Synthesizer
PDF

How to Cite

Design and Simulation of GaussianFSK Transmitter in UHF Band Using Direct Modulation of ΣΔ Modulator Fractional-N Synthesizer. (2008). Al-Khwarizmi Engineering Journal, 4(3), 1-7. https://alkej.uobaghdad.edu.iq/index.php/alkej/article/view/588

Publication Dates

Abstract

This research involves design and simulation of GaussianFSK transmitter in UHF band using direct modulation of ΣΔ  fractional-N synthesizer with the following specifications:

Frequency range (869.9– 900.4) MHz, data rate 150kbps, channel spacing (500 kHz), Switching time 1 µs, & phase noise @10 kHz = -85dBc.

New circuit techniques have been sought to allow increased integration of radio transmitters and receivers, along with new radio architectures that take advantage of such techniques. Characteristics such as low power operation, small size, and low cost have become the dominant design criteria by which these systems are judged.

A direct modulation by ΣΔ  fractional-N synthesizer is proposed in this research, because this approach provides the required characteristics such as low power. The Σ∆ modulator placed on digital phase-locked loop to control the fractional value of the frequency division ratio thereby eliminating spurious and allowing good phase noise performance. The modulation type of Gaussian FSK is used to obtain high spectral efficiency of modulated waveform.

The applications of this transmitter in low cost wireless data transfer, security systems, RF remote controls and wireless metering.

PDF

References

[1] A. A. Abidi, “Direct-conversion radio transceivers for digital communications,” in Proceedings of IEEE International Solid-State Circuits Conference, pp. 186–7, 1995.
[2] T. A. Riley and M. A. Copeland, “A simplified continuous phase modulator technique,”IEEE Transactions on Circuits and Systems — II: Analog and Digital Signal Processing, vol. 41, no. 5, pp. 321–328, May 1994.
[3] Goldberg, Bar-Giora., “Digital frequency synthesis demystified”,1999.
[4] J.A Crawford, “Frequency synthesizer Design Handbook”, Artech house, Norwood, 1994.
[5] Dean banerjee “PLL performance , simulation & design” 4th edition, 2005.
[6] Li Lin, “Design Techniques for High Performance Integrated Frequency Synthesizers for Multi-standard Wireless Communication Applications” UNIVERSITY OF CALIFORNIA, Ph.D., thesis, 2000.
[7] The Analog device series Data sheet, 2004.
[8] W. Djen and P. Shah, “Implementation of a 900 MHz transmitter system using highly imtegrated ASIC,” in IEEE 44th Vehicular Technology Conference, pp. 1341–5 vol. 2, June 1994.
[9] Lascari lance, “Accurate phase noise prediction in PLL frequency synthesizers” Applied Microwave & Wireless, VOL. 12, No.5, May 2000.
[10] I. A. Koullias, J. H. Havens, I. G. Post, and P. E. Bronner, “A 900 MHz transceiver chip set for dual-mode cellular radio mobile terminals”, in Proceedings of IEEE International Solid-State Circuits Conference, pp. 140–1, Feb. 1993.

Copyright: Open Access authors retain the copyrights of their papers, and all open access articles are distributed under the terms of the Creative Commons Attribution License, which permits unrestricted use, distribution and reproduction in any medium, provided that the original work is properly cited. The use of general descriptive names, trade names, trademarks, and so forth in this publication, even if not specifically identified, does not imply that these names are not protected by the relevant laws and regulations. While the advice and information in this journal are believed to be true and accurate on the date of its going to press, neither the authors, the editors, nor the publisher can accept any legal responsibility for any errors or omissions that may be made. The publisher makes no warranty, express or implied, with respect to the material contained herein.